From b24bd11098423139b17ca7dc29d5a2988556d724 Mon Sep 17 00:00:00 2001 From: Aki Date: Mon, 27 Mar 2023 22:46:06 +0200 Subject: Minor fixes and changed wording in make post --- how_to_build_software_with_make.html | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'how_to_build_software_with_make.html') diff --git a/how_to_build_software_with_make.html b/how_to_build_software_with_make.html index dce05aa..b5dd992 100644 --- a/how_to_build_software_with_make.html +++ b/how_to_build_software_with_make.html @@ -38,7 +38,7 @@ targets or source files. That's it. Later this concept is expanded upon to reduc

Since make live close to the compiler we will be also interested in object files (e.g., *.o, *.obj).

How to Build Executables With Make

-

Make helps us to reduce number of characters we need to type in terminal and lines we need to put to setup the +

Make helps us to reduce number of characters we need to type in terminal and lines we need to put to setup the build. In fact, the simplest case of one source file to one executable, like the one I showed above, does not need any preparation at all: 

@@ -163,14 +163,14 @@ libgreeting.so: greeting.o
 code, which is needed when compiling code for shared libraries that are expected to work nicely on Linux. Then, we
 set LDFLAGS - linker flags - to -shared which (put simply) tells the linker to build a shared
 object.
-
Now let's analyse linker command itself. Starting with $(LD) which is substituted with linker
-executable. We already know $(LDFLAGS), so $(LDLIBS) sounds like "linker libraries" and that's
-correct. Finally, we have two
+
Now let's analyse linker command itself. Starting with $(LD); it's substituted with the linker
+executable. We already know $(LDFLAGS) and $(LDLIBS) sounds quite similar. This one is
+intended to store all external libraries that linker should use. Finally, we have two
 automatic variables also known
 as internal
-macros: $^ (substituted by all dependencies) and $@ (substituted by target name). Note
+macros: $^ (substituted with all dependencies) and $@ (substituted with target name). Note
 that $^ is not part of POSIX.
-
When we finally run make we will see how it performs all predicted substitutions:
+
When we finally run make we can observe predicted commands:
 
 $ make
 cc -fPIC -c -o greeting.o greeting.c
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